Fundamentals of Computer Architecture

Fundamentals of Computer Architecture: Core CPU Components

Understanding the inner workings of a processor is essential for anyone studying computer architecture or preparing for certification exams. This course breaks down the most frequently tested concepts, such as the Arithmetic Logic Unit (ALU), the Control Unit (CU), general‑purpose registers, and the fetch‑decode‑execute cycle. Each section includes clear explanations, mnemonic aids, and practical examples to help you retain the material.

1. The Arithmetic Logic Unit (ALU)

The ALU is the heart of the CPU where all arithmetic (addition, subtraction, multiplication, division) and logical (AND, OR, NOT, XOR) operations are performed. It directly manipulates binary data stored in registers and returns the result to a register for temporary storage.

• Key function: Executes mathematical and logical instructions.
• Typical operations: ADD, SUB, AND, OR, XOR, SHIFT.
• Location: Integrated on the same silicon die as the Control Unit and registers.

Mnemonic to remember: Fetch → ALU → Store (FAS). The data is fetched from registers, processed by the ALU, and then stored back.

2. The Control Unit (CU)

The Control Unit orchestrates the entire fetch‑decode‑execute cycle. It does not perform calculations itself; instead, it generates control signals that direct other components—such as the ALU, registers, and memory—to carry out the required actions.

• Primary role: Retrieve the next instruction, decode it, and issue the appropriate control signals.
• What it does NOT do: Perform arithmetic, store program code, or manage cache coherence.
• Analogy: Think of the CU as a movie director who reads the script (instruction) and tells the actors (ALU, registers) what to do.

Mnemonic: Fetch Decode → FU DU (Control Unit).

3. General‑Purpose Registers (GPRs)

General‑purpose registers are small, ultra‑fast storage locations inside the CPU. They hold operands for the ALU, intermediate results, and temporary data that would otherwise require a slower memory access.

• Why they matter: Reduce traffic on the system bus by keeping frequently used data close to the ALU.
• Typical size: 32‑bit or 64‑bit depending on the architecture.
• Example usage: A program that repeatedly adds two numbers will load them into registers, perform the addition in the ALU, and store the result back into a register before writing to memory.

Mnemonic: Registers Entre Gravidade Processam Rapidamente (REGPR).

4. The Fetch‑Decode‑Execute Cycle

The fetch‑decode‑execute cycle is the fundamental process that every CPU follows to run a program. It consists of three distinct phases:

1. Fetch: The CU reads the next instruction from memory using the program counter (PC).
2. Decode: The instruction is placed in the Instruction Register (IR) and the CU determines which operation is required.
3. Execute: Depending on the decoded instruction, the CU activates the ALU, registers, or memory to complete the operation.

During this cycle, the CU continuously generates control signals, while the ALU performs the actual computation when needed.

5. Branch Instructions and Flow Control

Branch (or jump) instructions alter the sequential flow of execution by changing the value of the program counter. The Control Unit is responsible for handling these changes.

• Branch handling: The CU evaluates the branch condition, computes the target address, and updates the PC accordingly.
• Impact on performance: Frequent branching can cause pipeline stalls in modern superscalar CPUs.

Mnemonic: Unidade de Controle Una Comanda de Rota (U‑C‑U‑R) – “Controla o Roteamento”.

6. Data Path for an ALU Operation

When a CPU needs to add two numbers stored in registers, the following sequence occurs:

1. Fetch the instruction that specifies the addition.
2. Decode the instruction to identify the source registers.
3. Read the operand values from the source registers.
4. Send the operands to the ALU.
5. The ALU performs the addition and places the result in a temporary register (often a general‑purpose register).
6. The result is either stored back to a register or written to memory, depending on the instruction.

This flow emphasizes that the ALU never directly accesses main memory for simple arithmetic; the registers act as the bridge.

7. Temporary Storage of ALU Results

After the ALU computes a result, the value is temporarily held in a general‑purpose register. This allows subsequent instructions to use the result without incurring the latency of a memory write‑read cycle.

• Why not cache or instruction register? Cache is a higher‑level memory hierarchy, while the Instruction Register holds the current instruction, not data.
• Practical tip: When designing assembly code, always move the ALU result to a register before storing it to memory.

8. Distinguishing the ALU from the Control Unit

Although both are essential CPU components, their responsibilities are distinct:

• ALU: Executes arithmetic and logical operations.
• Control Unit: Generates control signals, orchestrates instruction flow, and manages branching.

Remember the phrase: "The ULA (ALU) executes; the CU (Control Unit) orchestrates."

9. Frequently Asked Quiz Questions – Review

Below are the original quiz items transformed into concise study notes. Use them to test your recall before an exam.

• Which component directly performs arithmetic and logical operations inside the CPU? – Arithmetic Logic Unit (ALU).
• During instruction execution, which unit generates control signals? – Control Unit (CU).
• Sequence for adding two numbers stored in registers? – Fetch numbers, send to ALU, store result in a register.
• Role of the Control Unit in the fetch‑decode‑execute cycle? – Retrieves and decodes the next instruction.
• Component that facilitates frequent data movement between CPU and memory? – General‑Purpose Registers.
• Distinguish ULA and Control Unit functions? – ULA executes arithmetic/logic; Control Unit orchestrates execution.
• Which component handles a branch to a non‑sequential address? – Control Unit.
• Component that temporarily holds the result of an ALU operation? – General‑Purpose Register.

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