10 questions · Electronics. Review key concepts before taking the quiz
10 questions~5 min
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1
A 4-bit DAC uses resistors of values R, 2R, 4R, and 8R. What is the output voltage when the digital input is 1000 and VREF = 15 V?
2
For an N‑bit DAC, the contribution of the k‑th input Dk to the output voltage is VREF/2^(N‑k). Which statement correctly describes the effect of increasing N while keeping VREF constant?
3
A DAC exhibits a monotonicity error. Which observable behavior best indicates this error during a ramp test?
4
In a resistive ladder DAC, why are only two resistor values (R and 2R) required regardless of the number of bits?
5
A 12‑bit ADC has a full‑scale input of 2 V. What is the ideal voltage represented by the least significant bit (LSB)?
6
During the integration phase of a dual‑slope ADC, the integrator output after a fixed interval TINT is proportional to which quantity?
7
Which ADC architecture requires the largest number of comparators for a 4‑bit implementation?
8
A tracking‑type ADC uses an up‑down binary counter. What is the main limitation of this architecture when the input signal changes rapidly?
9
According to Nyquist theorem, what minimum sampling rate is required to faithfully reconstruct a 5 kHz analog signal?
10
In a DAC, a gain error manifests as which of the following deviations from the ideal transfer characteristic?
Electronics · Quick Quizzes
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