Computer Organisation and Networks

Understanding Computer Organisation and Networks

Welcome to this comprehensive course on computer organisation and network fundamentals. Whether you are preparing for an exam or strengthening your foundation, this guide covers the essential concepts tested in typical quiz questions. Each topic is explained in plain language, reinforced with examples, and optimized for search engines so you can easily find the information you need.

1. Buses Inside a Computer: Address vs. Data

When a CPU needs to read a value from RAM, two distinct buses are involved:

• Address bus: carries the memory address that the CPU wants to access.
• Data bus: carries the actual data value read from (or written to) that address.

Think of the address bus as the mailing label on a letter, while the data bus is the content of the letter. The control bus coordinates timing but does not transport address or data directly.

2. The Fetch‑Decode‑Execute Cycle

The classic fetch‑decode‑execute model describes how a CPU processes instructions. To add two numbers stored at memory locations A and B, the correct sequence is:

1. Fetch the value at A and load it into a register.
2. Fetch the value at B and load it into a second register.
3. Execute the ADD instruction on the two registers.
4. Store the result back to a memory location (or keep it in a register for later use).

This approach reflects the CPU’s need to work with data inside registers, because the arithmetic‑logic unit (ALU) cannot operate directly on values that remain in RAM.

3. Two’s‑Complement Overflow in a 4‑Bit System

Two’s‑complement representation allows signed numbers to be stored using binary. In a 4‑bit system, the most significant bit (MSB) is the sign bit. When adding two positive numbers, overflow occurs if the result cannot be represented with the available bits.

For example, adding 0101 (5) and 0011 (3) yields 1000. The MSB becomes 1, so the result appears negative (-8), signalling an overflow condition. The CPU typically sets an overflow flag to alert the program.

4. IP Subnetting: Finding the Network Address

Given the host address 192.168.5.130/26, we need to determine the network address.

• A /26 mask leaves 6 host bits (since IPv4 has 32 bits total).
• Each subnet therefore contains 2⁶ = 64 addresses.
• The subnets start at 0, 64, 128, 192, …
• Address 130 falls in the block that starts at 192.168.5.128.

Thus the correct network address is 192.168.5.128. Any host address between 192.168.5.129 and 192.168.5.190 (inclusive) belongs to the same subnet.

Which of these would also be a valid host address in the same subnet? 192.168.5.130, 192.168.5.200, or 192.168.5.70?

5. Interrupts vs. Polling for Keyboard Input

Modern operating systems favour interrupt-driven I/O over polling for several reasons:

• When the keyboard generates an interrupt, the CPU can sleep or perform other tasks until the event occurs, saving valuable processing cycles.
• Polling requires the CPU to repeatedly check the keyboard status, wasting time even when no key is pressed.
• Interrupts provide a scalable way to handle many devices simultaneously, each with its own interrupt line.

Therefore, interrupts improve efficiency and overall system responsiveness.

6. Interpreting 8‑Bit Two’s‑Complement Numbers

To decode the binary pattern 1011 in an 8‑bit two’s‑complement system, first extend it to 8 bits: 00001011 is positive, but the leading bit is 1, indicating a negative number. The conversion steps are:

1. Invert the bits: 0100.
2. Add 1: 0101 which equals decimal 5.
3. Apply the sign: the original number is -5.

Thus the correct decimal value is -5.

7. What Stays Unchanged When a Router Forwards a Packet?

When a router receives an Ethernet frame, it examines the destination MAC address. After processing, the router:

• Rewrites the MAC header for the next hop (source and destination MAC addresses change).
• Leaves the IP header intact, because the IP layer is responsible for end‑to‑end delivery.

Therefore, the IP header remains unchanged as the packet traverses multiple routers.

8. Unsigned 16‑Bit Integer Overflow

Adding two large unsigned numbers can exceed the maximum value a 16‑bit register can store (65535). For the addition 40000 + 30000 = 70000:

• Subtract the wrap‑around value: 70000 - 65536 = 4464.
• The register therefore holds 4464 after overflow.

This phenomenon is called modular arithmetic and is fundamental to low‑level programming and hardware design.

Which step helped you most: realizing the max is 65535, subtracting 65536, or seeing the wrap‑around picture?

9. Summary of Key Concepts

By mastering the topics above, you will be able to answer typical quiz questions on computer organisation and networking with confidence. Remember:

• The address bus carries addresses; the data bus carries values.
• CPU operations follow the fetch‑decode‑execute cycle, using registers for arithmetic.
• Two’s‑complement overflow produces a sign‑bit change, signalling an error condition.
• Subnet masks define network boundaries; a /26 mask creates 64‑address blocks.
• Interrupts let the CPU idle efficiently, unlike constant polling.
• Negative numbers in two’s‑complement are obtained by inverting bits and adding one.
• The IP header survives router hops, while MAC headers are rewritten.
• Unsigned overflow wraps around using modulo 2ⁿ arithmetic.

These fundamentals are essential for both computer architecture and network engineering professionals.